Upscale AI Launches Token Fabric to Unify Rival AI Chips Across 115.2 Tbps Scale-Up Silicon

Upscale AI, the high-speed data center networking startup valued at $2 billion following $500 million in total funding and strategic backing from NVIDIA, has unveiled Token Fabric—an integrated hardware and software interconnect platform engineered to let AI data centers combine accelerators from rival chipmakers across a single unified scale-up and scale-out network.

As hyperscalers and enterprise cloud operators deploy custom ASICs (such as Microsoft’s Azure Maia 200/300, AWS Trainium3, and Google TPUs) alongside merchant GPUs from NVIDIA and AMD, data center architects have hit a severe networking wall. Historically, AI clusters have required two completely separate networking silos: proprietary intra-rack “scale-up” fabrics (like NVLink) for ultra-low-latency memory sharing between chips inside a single node or rack, and inter-rack “scale-out” Ethernet or InfiniBand fabrics to connect racks across the data center floor. Running heterogeneous AI chips meant standing up isolated network islands that could not pool compute or dynamically balance token generation workloads.

Led by CEO Barun Kar, Upscale AI designed Token Fabric to collapse those silos into a single standards-based fabric. For intra-rack scale-up connectivity, Token Fabric introduces Upscale’s custom SkyFabriX switch silicon—derived from its SkyHammer architecture (whose standalone switch ASIC delivery was recently shifted to 2027)—delivering 115.2 terabits per second (Tbps) of switching capacity with native support for open interconnect standards including OCP ESUN and Ultra Accelerator Link over Ethernet (UALoE).

For inter-rack scale-out connectivity across the data center, Token Fabric pairs SkyFabriX with NVIDIA Spectrum-X Ethernet supporting 400G, 800G, and 1.6T optical links. The entire heterogeneous topology is governed by Upscale’s SkyOS network operating system and SkyCMD orchestration suite, which continuously monitor collective communication bottlenecks across mixed accelerator pools and allow operators to buy either the full turnkey platform or modular silicon, switch systems, and software licenses.

As reported by Ali Azhar in HPCwire’s coverage of Upscale AI’s Token Fabric launch, early-access testing with hyperscale and neocloud customers is underway now ahead of initial component deliveries in late 2026 and general availability in early 2027, with Kar projecting tens of millions of dollars in initial 2027 revenue scaling into the hundreds of millions as multi-vendor AI clusters proliferate.

Architectural Breakdown: Legacy Siloed Clusters vs. Upscale Token Fabric

Why Disaggregated Prefill-Decode Inference Demands Unified Chip Fabrics

While training a single frontier model across two different chip architectures remains challenging due to floating-point determinism and compiler differences (such as CUDA vs. ROCm or custom ASIC kernels), heterogeneous networking is immediately transformative for disaggregated LLM inference. In modern production serving, compute-bound prompt prefill and memory-bandwidth-bound token decoding have completely different hardware economics: operators often want to run prefill on dense merchant GPUs while offloading KV-cache decoding to high-memory-bandwidth custom ASICs or competing accelerators.

Without a unified low-latency fabric bridging those racks, transferring gigabytes of KV-cache state from a prefill cluster to a rival vendor’s decode cluster introduces crippling network tail latency. By combining 115.2 Tbps UALoE/OCP ESUN scale-up switching with 800G/1.6T Spectrum-X scale-out Ethernet under SkyOS, Token Fabric aims to let data centers route KV caches and expert activations seamlessly across multi-vendor silicon.

The 4-Step Enterprise Implementation Playbook

1. Mandate Open Scale-Up Standards (UALoE / OCP ESUN) in 2027 Data Center RFPs: If your infrastructure team is designing AI cluster expansions for 2027, avoid locking 100% of rack-level interconnect to a single chip vendor’s proprietary protocol; specify OCP ESUN and UALoE compatibility so racks can accept alternative accelerators over a 5-year depreciation cycle.
2. Design Disaggregated Prefill/Decode Topologies Across Heterogeneous Silicon: Evaluate using unified 800G/1.6T fabrics like Token Fabric to pair compute-dense GPUs (for prefill) with cost-optimized custom ASICs or high-HBM accelerators (for decode) within the same logical cluster.
3. Instrument Collective Communication Tail Latency With Network Telemetry: Most distributed training and MoE inference slowdowns stem from micro-burst congestion rather than raw FLOPS; deploy fabric-wide telemetry (such as SkyCMD) to detect and isolate straggler links before they stall thousand-chip all-to-all collectives.
4. Decouple Switch Silicon, Optics, and NOS Procurement Where Economical: Take advantage of modular networking platforms by evaluating standalone SkyOS software and 800G/1.6T Ethernet switching independently of full-rack compute bundles.